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Wednesday, September 10, 2014

Embedded systems


Difference between Static RAM Dynamic RAM.

Static RAM Dynamic RAM
1. SRAM1. DRAM
2. It retains it levels so no require refreshing2. It requires some refreshing.
3. Power consumption is more3. Power consumption is less.
4. Speed is fast.4. Speed is less.
5. Package density is low.5. Package density is high.
6. Size can't be increase.6. Size can increase.
7. More expensive.7. Less expensive.
8. Made up of 6 CMOS transistors(MOSFET).8. Made up of a MOSFET and a capacitor.



Difference between RISC and CISC processors/controllers.

RISCCISC
1. It stands for Reduced Instruction Set Computing.1. It stands for Complex Instruction Set Computing.
2. Lesser number of instructions.2. Greater number of Instructions
3. Instruction pipe-lining and increased execution speed.3. Generally no instruction pipe-lining feature.
4. Orthogonal instruction set.4. Non-Orthogonal instruction set.
5. Operations are performed on register only, the only memory operations are load and store.5. Operations are performed on register or memory depending on the instruction.
6. A large number of registers are available6. Limited number of general purpose register.
7. Programmer needs to write more code to execute a task since the instruction are simpler ones.7. Instructions are like macros in C language. A programmer can achieve the desired functionality with a single instruction.
8. Single, fixed length instructions.8. Variable length instructions
9. Less silicon usage and pin count.9. More silicon usage since more additional decoder logic as required.
10. With Harvard Architecture.10. Can be Harvard or Von- Neumann Architecture.



Difference between microprocessor and micro-controller.

MicroprocessorMicro-controller
1.A silicon chip representing a central processing unit (CPU), which is capable of performing arithmetic as well as logical operations according to a pre defined set of instructions.1.A micro-controller is a highly integrated chip that contains a CPU, scratchpad RAM, special and general purpose register arrays, on chip ROM / FLASH memory for program storage, timer and interrupt control units and dedicated  I/O ports.
2.It is a dependent unit .It requires the combination of other chips like timers, program and data memory chips, interrupt controllers, etc. for functioning.2.It is a self-contained unit and it doesn't require external interrupt controller , timer , UART , etc. for its functioning.
3.Most of the time general purpose in design and operation .3.Mostly application-oriented or domain - specific.
4. Doesn't, contain a built in I/O port.The I/O port functionality needs to be implemented with the help of external programmable peripheral interface chips like 8255.4.Most of the processor contain multiple built-in I/O ports which can be operated as a single 8 or 16 or 32 bit port or as individual port pins.
5.Targeted for high end market where performance is important.5.Targeted for embedded market where performance is not critical.
6.Limited power saving options compared to micro-controllers.6.Includes lot of power saving features.



Difference between Harvard Architecture and Von-Neumann Architecture.

Harvard ArchitectureVon-Neumann Architecture.
1.Separate buses for instruction and data fetching.1.Single shared bus for instruction and data fetching.
2.Easier to pipeline , so high performance can be achieved .2. Low performance compared to Harvard architecture
3.Comparatively high cost.3. Cheaper
4.No memory alignment problems.4. Allow self modifying codes.
5.Since data memory and program memory are stores physically in different locations, no chances for accidental corruption of program memory.5. Since data memory and program memory are stores physically in the same chip , chances for accidental corruption of program memory.



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